The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2019
Filed:
Oct. 31, 2016
Dotslam, Inc., Lafayette, CA (US);
Lewis James Marggraff, Lafayette, CA (US);
Nelson G. Publicover, Reno, NV (US);
Blake Marggraff, Lafayette, CA (US);
Edward D. Krent, Sharon, MA (US);
Marc M. Thomas, Mokelumne Hill, CA (US);
DOTSLAM, INC., Lafayette, CA (US);
Abstract
Systems and methods are provided to produce electromechanical interconnections within integrated circuits (ICs), printed circuit boards (PCBs) and between PCBs and other electronic components such as resistors, capacitors and integrated circuits. Elements include so-called 'smart pins' or 'neuro-pins' that facilitate electrical pathways in the dimension normal to the plane of a PCB. Smart pins or neuro-pins may be inserted using automated processes that do not require the high temperatures normally associated with soldering. Resultant circuits generally contain a large number of layers that are more compact and more readily constructed compared with conventional PCB-based circuitry.