The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2019
Filed:
Jun. 24, 2018
Applicants:
Tuvia Liran, Qiryat Tivon, IL;
Uzi Zangi, Hod-Hasharon, IL;
Tzach Hadas, Zichron Yaakov, IL;
Inventors:
Assignee:
PLSense Ltd., Yokneam Elit, IL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/24 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
H03K 5/2481 (2013.01); H03K 17/6872 (2013.01);
Abstract
A method and apparatus for implementing a CMOS buffer for driving a reference voltage that consumes very low current in normal operating conditions but drive high current when output voltage is off, tracking the required reference voltage. The circuit is operating in a 'deadzone' most of the time, where pull-up and pull-down current paths are blocked, and ultra-low power comparators, with build-in offset, are monitoring the output voltage continuously, and driving compensation current, when needed. The circuit can be manufactured with a standard CMOS processing technology.