The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2019

Filed:

Jun. 05, 2018
Applicants:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Seoul National University R&db Foundation, Seoul, KR;

Inventors:

Jaewook Kim, Seoul, KR;

Mino Kim, Seoul, KR;

Suhwan Kim, Seoul, KR;

Deog-Kyoon Jeong, Seoul, KR;

Assignees:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Seoul National University R&DB Foundation, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01); H03K 5/06 (2006.01); H03K 5/135 (2006.01); H03K 5/26 (2006.01); H03K 21/02 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 3/017 (2013.01); H03K 5/06 (2013.01); H03K 5/135 (2013.01); H03K 5/26 (2013.01); H03K 21/02 (2013.01); H03K 2005/00156 (2013.01);
Abstract

In an embodiment, a delay circuit comprises a delay loop controller outputting a signal obtained by operating a start signal and a delayed feedback clock signal output from outside the delay loop controller; and a loop counter configured to determine whether a predetermined delay time has elapsed since the start signal was input according to the delayed feedback clock signal and a predetermined loop count.


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