The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2019

Filed:

Jan. 03, 2018
Applicant:

Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;

Inventors:

Hidehiko Karasaki, Osaka, JP;

Hidefumi Saeki, Osaka, JP;

Atsushi Harikai, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 23/544 (2006.01); H01L 21/268 (2006.01); H01L 21/3065 (2006.01); H01L 21/02 (2006.01); B23K 26/359 (2014.01); H01L 21/82 (2006.01); H01L 21/67 (2006.01); H01L 21/683 (2006.01); B23K 26/062 (2014.01); H01J 37/32 (2006.01); B23K 103/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); B23K 26/062 (2015.10); B23K 26/359 (2015.10); H01L 21/02076 (2013.01); H01L 21/268 (2013.01); H01L 21/3065 (2013.01); H01L 21/67103 (2013.01); H01L 21/67109 (2013.01); H01L 21/6831 (2013.01); H01L 21/82 (2013.01); H01L 23/544 (2013.01); B23K 2103/56 (2018.08); H01J 37/321 (2013.01); H01J 2237/334 (2013.01); H01L 2223/5446 (2013.01);
Abstract

Provided is a manufacturing process of an element chip, which comprises a preparation step for preparing a substrate including a semiconductor layer having first and second sides and a wiring layer on the first side thereof, the substrate having a plurality of dicing regions and element regions defined by the dicing regions, a scribing step for radiating a laser beam towards the first side of the wiring layer onto the dicing regions to form apertures exposing the semiconductor layer along the dicing regions, and a dicing step for dicing the substrate along the apertures into a plurality of the element chips, wherein the laser beam has a beam profile having a M-shaped distribution whose peripheral intensity is greater than a central intensity in a width direction of the laser beam along the dicing regions.


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