The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2019
Filed:
Dec. 17, 2018
Mythic, Inc., Austin, TX (US);
David Fick, Austin, TX (US);
Michael Henry, Austin, TX (US);
Laura Fick, Austin, TX (US);
Malav Parikh, Austin, TX (US);
Skylar Skrzyniarz, Austin, TX (US);
Scott Johnson, Austin, TX (US);
Pei-Ci Wu, Austin, TX (US);
Andrew Morten, Austin, TX (US);
Mythic, Inc., Austin, TX (US);
Abstract
Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct utilization constraint types based on computing attributes of the one or more applications; identifying at least one coefficient mapping technique from a plurality of distinct coefficient mapping techniques that addresses the utilization constraint type; configuring the fixed memory array according to the at least one coefficient mapping technique, wherein configuring the array includes at least setting within the array the coefficients of the one or more applications in an arrangement prescribed by the at least one coefficient mapping technique that optimizes a computational utilization of the fixed memory array.