The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2019

Filed:

Jul. 03, 2018
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Hongtao Zhang, San Jose, CA (US);

Jinyung NamKoong, San Jose, CA (US);

Winson Lin, San Francisco, CA (US);

Yohan Frans, Palo Alto, CA (US);

Geoffrey Zhang, San Jose, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01); H04L 7/00 (2006.01); H04L 7/033 (2006.01); H03L 7/081 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0025 (2013.01); H03L 7/0812 (2013.01); H04L 7/0012 (2013.01); H04L 7/0079 (2013.01); H04L 7/0337 (2013.01);
Abstract

A receiver circuit for receiving data is described. The receiver circuit comprises a phase detector configured to receive an input data signal; a frequency path circuit configured to receive an output of the phase detector; and a false lock detection circuit configured to receive the output of the phase detector and an output of the frequency path circuit; wherein the false lock detection circuit detects a false lock of the receiver circuit to the input data signal based upon an output of the phase detector and provides a frequency offset to the frequency path circuit. A method of receiving data is also described.


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