The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2019
Filed:
Apr. 14, 2017
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Shenzhen, CN;
Xiaodi Liu, Shenzhen, CN;
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Shenzhen, Guangdong, CN;
Abstract
The present invention provides a mask for manufacturing a TFT in a 4M production process and a TFT array manufacturing method of a 4M production process. For the mask for manufacturing a TFT in a 4M production process, in a TFT layout structure of the mask, a line pattern is provided adjacent to an outer edge of a TFT pattern to extend along the outer edge of the TFT pattern. The present invention also provides a corresponding TFT array manufacturing method of the 4M production process, which uses the mask of the present invention to serve as a mask for a second mask-based process. The mask for manufacturing a TFT in a 4M production process according to the present invention allows for achievement of an edge-thinned structure through variation of edge exposure of the mask so as to make plasma etching more easily performed on such a structure to thereby reduce residues of amorphous silicon and heavily-doped silicon on an edge of a second metal layer. The TFT array manufacturing method of the 4M production process of the present invention is such that the mask of the present invention is used in combination with a 4M production process to alleviate the problems of residues of amorphous silicon and heavily doped silicon on an edge of a second metal layer.