The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2019

Filed:

Aug. 17, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Young-Chul Cho, Seongnam-si, KR;

Min-Su Ahn, Suwon-si, KR;

Jung-Hwan Choi, Hwaseong-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 23/00 (2006.01); H01L 23/525 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 23/525 (2013.01); H01L 23/5227 (2013.01); H01L 23/53295 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/05024 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/49171 (2013.01); H01L 2924/00014 (2013.01);
Abstract

A semiconductor device includes a substrate having a cell region and a circuit region, an upper wiring layer on the substrate, and a redistribution wiring layer on the upper wiring layer. The upper wiring layer includes a secondary uppermost wiring in the circuit region and an uppermost wiring on the secondary uppermost wiring. The uppermost wiring includes an uppermost chip pad electrically connected to the secondary uppermost wiring. At least a portion of the uppermost chip pad in the cell region. The redistribution wiring layer includes a redistribution wiring electrically connected to the uppermost chip pad. At least a portion of the redistribution wiring serving as a landing pad connected to an external connector.


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