The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2019

Filed:

Aug. 30, 2017
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Simone Lavanga, Faak am See, AT;

Uttiya Chowdhury, Villach, AT;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/04 (2006.01); H01L 29/15 (2006.01); H01L 29/20 (2006.01); H01L 29/32 (2006.01); H01L 29/66 (2006.01); H01L 29/205 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02507 (2013.01); H01L 21/0251 (2013.01); H01L 21/0254 (2013.01); H01L 21/02381 (2013.01); H01L 21/02433 (2013.01); H01L 21/02458 (2013.01); H01L 21/02636 (2013.01); H01L 21/02658 (2013.01); H01L 29/045 (2013.01); H01L 29/155 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/2006 (2013.01); H01L 29/32 (2013.01); H01L 29/66462 (2013.01); H01L 29/7784 (2013.01); H01L 29/7786 (2013.01);
Abstract

A method of forming a compound semiconductor substrate includes providing a crystalline base substrate having a first semiconductor material and a main surface, and forming a first semiconductor layer on the main surface and having a pair of tracks disposed on either side of active device regions. The first semiconductor layer is formed from a second semiconductor material having a different coefficient of thermal expansion than the first semiconductor material. The pair of tracks have a relatively weaker crystalline structure than the active device regions. The method further includes thermally cycling the base substrate and the first semiconductor layer such that the first semiconductor layer expands and contracts at a different rate than the base substrate. The pair of tracks physically decouple adjacent ones of the active device regions during the thermal cycling.


Find Patent Forward Citations

Loading…