The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2019
Filed:
Oct. 25, 2017
Applicant:
SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;
Inventors:
Byung Kuk Yoon, Suwon-si, Gyeonggi, KR;
Honggyeom Kim, Icheon-si, Gyeonggi, KR;
Assignee:
SK hynix Inc., Icheon-si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1066 (2013.01); G11C 7/106 (2013.01); G11C 7/1045 (2013.01); G11C 7/1087 (2013.01); G11C 7/1093 (2013.01); G11C 7/222 (2013.01); G11C 2207/107 (2013.01);
Abstract
A semiconductor device includes a read mode signal generation circuit and a read alignment circuit. The read mode signal generation circuit compares a read command with at least one of internal clock signal to generate a read mode signal. The read alignment circuit is synchronized with the at least one internal clock signal to generate read data in response to internal data. The read alignment circuit controls an alignment sequence of the internal data in response to the read mode signal.