The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2019

Filed:

Dec. 24, 2014
Applicant:

Joled Inc., Tokyo, JP;

Inventor:

Hirofumi Nakagawa, Tokyo, JP;

Assignee:

JOLED INC., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/038 (2013.01); G09G 3/3225 (2016.01); G09G 3/3266 (2016.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3225 (2013.01); G09G 3/3266 (2013.01); G09G 3/3648 (2013.01); G09G 2300/0408 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0286 (2013.01); G09G 2330/028 (2013.01);
Abstract

A gate driver IC includes: N shift registers which generate a gate signal to be supplied to a display panel substrate, N being a natural number; (N+k) power supply terminals (PAto PD, Pa, and Pc) for power supply from outside, k being a natural number; and (N+k) internal lines connected to the (N+k) power supply terminals, wherein N internal lines among the (N+k) internal lines connect, one-to-one, N power supply terminals among the (N+k) power supply terminals and the N shift registers, and k internal lines other than the N internal lines among the (N+k) internal lines connect, one-to-one, k power supply terminals other than the N power supply terminals among the (N+k) power supply terminals and k internal lines selected from among the N internal lines.


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