The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2019

Filed:

Sep. 11, 2017
Applicant:

Stmicroelectronics (Rousset) Sas, Rousset, FR;

Inventors:

Dragos Davidescu, Lambesc, FR;

Sandrine Lendre, Pourrières, FR;

Olivier Ferrand, Aix-en-Provence, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 1/3234 (2019.01); G06F 1/3293 (2019.01); G06F 13/24 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1673 (2013.01); G06F 1/3243 (2013.01); G06F 1/3293 (2013.01); G06F 13/24 (2013.01); Y02D 10/122 (2018.01); Y02D 10/152 (2018.01);
Abstract

An embodiment system includes a first processor configured to process a suite of instructions and a second processor configured to process a subset of the suite of instructions. The system further includes a power management circuit configured to select the first processor or the second processor as a selected processor, the power management circuit being further configured to activate the selected processor or place the selected processor on standby. The system also includes a first peripheral device configured to generate a first interrupt signal, a switch configured to direct the first interrupt signal to the selected processor, and a first memory configured to store a first interrupt routine associated with the first interrupt signal, the selected processor being configured to execute the first interrupt routine in response to the first interrupt signal.


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