The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2019

Filed:

May. 24, 2016
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Bhaarath Kumar, Fremont, CA (US);

Sarosh I. Azad, Fremont, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/0862 (2016.01); G06F 12/1027 (2016.01); G06F 12/1009 (2016.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0862 (2013.01); G06F 12/1009 (2013.01); G06F 12/1027 (2013.01); G06F 13/28 (2013.01); G06F 2212/6026 (2013.01); G06F 2212/65 (2013.01); G06F 2212/68 (2013.01);
Abstract

Virtual memory pre-fetch requests are generated for a virtual memory and a multiple port memory management unit (MMU) circuit. Virtual memory access requests sent to a particular port of the MMU circuit are monitored. In response to the satisfaction of a trigger condition, virtual memory pre-fetch requests are generated and transmitted to the MMU circuit using the particular port. Physical access requests from the MMU circuit are monitored for physical addresses corresponding to the virtual memory pre-fetch requests. The physical access requests corresponding to the virtual memory pre-fetch requests are filtered.


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