The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2019
Filed:
Apr. 21, 2017
Synaptics Japan Gk, Tokyo, JP;
Tsuyoshi Kuroiwa, Tokyo, JP;
Synaptics Japan GK, Tokyo, JP;
Abstract
Provided is a technique which enables the avoidance of a temporal damage to a panel module, and keeps a voltage load on a display panel circuit node from becoming excessively large even if a constant voltage is applied to the node for a longer time exceeding a display drive term in a non-display drive term, provided that a display frame period is divided to have display and non-display drive terms. In performing display and touch-sensing actions on condition that a display frame period is divided to include display and non-display drive terms, an operation source voltage supplied to a panel module during the non-display term where touch sensing is performed is smaller, in absolute value, than that supplied in the display term, whereby a voltage load applied to an input circuit node of a panel module for a longer time exceeding the display term is kept from being excessively large.