The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2019
Filed:
Jun. 20, 2017
Applicants:
SK Hynix Inc., Gyeonggi-do, KR;
Korea Advanced Institute of Science and Technology, Daejeon, KR;
Inventors:
Jeong-Seok Ha, Daejeon, KR;
Dae-Sung Kim, Gwangju, KR;
Assignees:
SK hynix Inc., Gyeonggo-do, KR;
Korea Advanced Institute of Science and Technology, Daejeon, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/29 (2006.01); H03M 13/15 (2006.01); G06F 11/10 (2006.01); H03M 13/00 (2006.01); H03M 13/11 (2006.01);
U.S. Cl.
CPC ...
H03M 13/2927 (2013.01); G06F 11/1076 (2013.01); H03M 13/293 (2013.01); H03M 13/2909 (2013.01); H03M 13/616 (2013.01); H03M 13/1102 (2013.01); H03M 13/152 (2013.01); H03M 13/1515 (2013.01); H03M 13/2957 (2013.01);
Abstract
An operation method of a memory controller may include performing a first decoding operation to a message of an internal region included in a codeword received from a semiconductor memory device by using an internal parity, wherein the message and the internal parity are included in the internal region in a matrix form; and performing a second decoding operation to the internal region, to which the first decoding operation is performed, by using an outer parity of an outer region.