The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2019

Filed:

Jul. 02, 2018
Applicant:

Qm Power, Inc., Kansas City, MO (US);

Inventors:

Charles J Flynn, Greenwood, MO (US);

Cooper Tracy, Kansas City, MO (US);

Scott Hunter, Kansas City, MO (US);

Assignee:

QM Power, Inc., Kansas City, MO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/32 (2007.01); H03K 17/785 (2006.01); H02M 7/217 (2006.01); H02J 4/00 (2006.01); H03K 17/687 (2006.01); H02M 5/293 (2006.01);
U.S. Cl.
CPC ...
H03K 17/785 (2013.01); H02J 4/00 (2013.01); H02M 1/32 (2013.01); H02M 7/2176 (2013.01); H03K 17/6871 (2013.01); H02M 2005/2937 (2013.01);
Abstract

A switching circuit includes a bridge rectifier to receive voltage inputs and an optical isolator to receive a logic input signal and generate an output signal based on the logic input signal. The high speed switching circuit also includes a field effect transistor (FET) with a source connected to a negative output of the bridge rectifier, a drain connected to a positive output of the bridge rectifier through a load, and a gate driven by the output signal of the optical isolator. First and second resistors connect the voltage inputs to the gate of the FET through first and second diodes. The first and second resistors and the first and second diodes limit current flowing to the gate of the FET. A Zener diode connected to the gate of the FET limits voltage to the gate of the FET below a maximum voltage rating of the FET.


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