The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2019
Filed:
Jun. 28, 2018
Applicant:
Fuji Electric Co., Ltd., Kanagawa, JP;
Inventor:
Motomitsu Iwamoto, Matsumoto, JP;
Assignee:
FUJI ELECTRIC CO., LTD., Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); G11C 5/14 (2006.01); G05F 1/56 (2006.01); G11C 7/06 (2006.01); G11C 29/02 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45246 (2013.01); G05F 1/56 (2013.01); G11C 5/147 (2013.01); H03F 3/45488 (2013.01); H03F 3/45753 (2013.01); G11C 7/062 (2013.01); G11C 29/026 (2013.01); G11C 29/028 (2013.01);
Abstract
A differential circuit including: a first MOS transistor and a second MOS transistor that constitute a differential pair; a determination unit to determine a level of a determination target signal that is based on at least one of differential inputs being input to gate of the first MOS transistor and a gate of the second MOS transistor; and a voltage changing unit to change a back gate voltage that is supplied to both back gates of the first MOS transistor and the second MOS transistor according to a determination result of the determination unit, and an OP-amp will be provided.