The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2019
Filed:
Jan. 15, 2018
Applicant:
Samsung Display Co., Ltd., Yongin-si, KR;
Inventors:
Jun Hee Lee, Hwaseong-si, KR;
In Jun Bae, Seoul, KR;
Assignee:
Samsung Display Co., Ltd., Yongin-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 27/32 (2006.01); H01L 27/12 (2006.01); H01L 23/532 (2006.01); H01L 51/52 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78693 (2013.01); H01L 23/53219 (2013.01); H01L 27/124 (2013.01); H01L 27/3246 (2013.01); H01L 27/3258 (2013.01); H01L 27/3262 (2013.01); H01L 29/78696 (2013.01); H01L 51/5203 (2013.01); H01L 2251/558 (2013.01);
Abstract
A thin film transistor array panel according to an exemplary embodiment includes: a substrate; a metal pattern positioned on the substrate; a buffer layer positioned on the metal pattern; and a semiconductor layer positioned on the buffer layer and including a source region, a channel region, and a drain region, wherein the metal pattern overlaps at least one of the source region and the drain region, and the metal pattern does not overlap the channel region.