The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2019

Filed:

Apr. 26, 2018
Applicant:

Sakai Display Products Corporation, Osaka, JP;

Inventor:

Masahiro Kato, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); G02F 1/1333 (2006.01); G02F 1/1335 (2006.01); G02F 1/1362 (2006.01); H01L 27/12 (2006.01); G02F 1/1368 (2006.01);
U.S. Cl.
CPC ...
H01L 29/786 (2013.01); G02F 1/133345 (2013.01); G02F 1/133514 (2013.01); G02F 1/136286 (2013.01); H01L 27/124 (2013.01); G02F 1/1368 (2013.01); G02F 2001/133354 (2013.01); G02F 2201/123 (2013.01);
Abstract

There is provided a manufacturing method for a thin-film transistor substrate, which enables to excellently perform alignment between an annealed region of a semiconductor film and a mask pattern of a conductive film. The method comprises annealing a semiconductor film being formed on a gate insulation film covering a gate electrode with a laser beam by using a mask, the gate electrode being formed within a thin-film transistor substrate region on a substrate; forming a first alignment mark outside the thin-film transistor substrate region on the substrate, by irradiating the substrate through the mask with the laser beam; patterning the semiconductor film; forming a conductive film on the semiconductor film; positioning a photomask on the basis of the first alignment mark; and forming a source electrode and a drain electrode by patterning the conductive film through the photomask; wherein the first alignment mark is formed while annealing the semiconductor film.


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