The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2019

Filed:

Sep. 20, 2017
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Hui Zang, Guilderland, NY (US);

Min-Hwa Chi, Malta, NY (US);

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01); H01L 27/088 (2006.01); H01L 21/768 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0847 (2013.01); H01L 21/76802 (2013.01); H01L 21/76879 (2013.01); H01L 21/76895 (2013.01); H01L 27/088 (2013.01); H01L 29/785 (2013.01); H01L 29/7839 (2013.01);
Abstract

A method includes forming a device above an active region defined in a semiconducting substrate. The device includes a first gate structure, a first spacer formed adjacent the first gate structure, and first conductive source/drain contact structures positioned adjacent the first gate structure and separated from the first gate structure by the first spacer. A first portion of the first conductive source/drain contact structures is recessed at a first axial position along the first gate structure to define a first cavity. A second portion of the first conductive source/drain contact structures is recessed at a second axial position along the gate structure to define a second cavity. A dielectric cap layer is formed in the first and second cavities. A first conductive contact contacting the first gate structure in the first axial position is formed.


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