The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2019
Filed:
May. 15, 2018
Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;
Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;
JunHong Feng, Shanghai, CN;
SEMICONDUCTOR MFG. INTL. (SHANGHAI) CORP., Shanghai, CN;
SEMICONDUCTOR MFG. INTL. (BEIJING) CORP., Beijing, CN;
Abstract
The present application discloses an electro-static discharge (ESD) transistor array apparatus, and relates to the field of semiconductor technologies. The ESD transistor array apparatus may include: a semiconductor substrate, the semiconductor substrate including a semiconductor layer, a doped region on the semiconductor layer, and a substrate contact region, where the doped region and the substrate contact region are isolated, and where the substrate contact region includes at least a first contact region part separately disposed on two sides of the doped region; multiple gates arranged in parallel on the doped region, where a direction of extension of the multiple gates is in parallel with a direction of extension of the first contact region part; and a dissipation layer contact member disposed on each gate along the direction of extension of the gate, where density of the dissipation layer contact member decreases with a decrease in a distance from the gate on which the dissipation layer contact member is located to the first contact region part on a corresponding side. By means of the present disclosure, uniform heat dissipation of an ESD transistor array apparatus can be achieved.