The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2019

Filed:

Dec. 19, 2016
Applicant:

Oki Data Corporation, Tokyo, JP;

Inventor:

Kimitoshi Sato, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 21/60 (2013.01); G06F 3/12 (2006.01); G06F 21/31 (2013.01); H04N 1/44 (2006.01);
U.S. Cl.
CPC ...
G06F 3/1238 (2013.01); G06F 3/1222 (2013.01); G06F 3/1257 (2013.01); G06F 3/1271 (2013.01); G06F 3/1275 (2013.01); G06F 3/1279 (2013.01); G06F 21/31 (2013.01); G06F 21/608 (2013.01); H04N 1/4433 (2013.01); G06F 3/1204 (2013.01); G06F 3/1219 (2013.01); G06F 3/1239 (2013.01); G06F 3/1255 (2013.01); H04N 2201/0094 (2013.01);
Abstract

An image processing apparatus includes an executing circuitry, a macro executing circuitry, and a managing circuitry. The executing circuitry executes one or more types of image processing. The macro executing circuitry executes, with the executing circuitry, a first macro to which predetermined one or more types of image processing out of the one or more types of image processing are assigned. The predetermined one or more types of image processing includes a first type of image processing. The managing circuitry manages execution authority setting of the first type of image processing and execution authority setting of the first macro, and temporarily changes the execution authority setting of the first type of image processing on a basis of the execution authority setting of the first macro upon the execution of the first macro by the macro executing circuitry.


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