The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2019

Filed:

Oct. 18, 2016
Applicant:

Analog Devices Global, Hamilton, BM;

Inventors:

Andreas Koch, Wiesbaden, DE;

Stefan Hacker, München, DE;

Assignee:

Analog Devices Global, Hamilton, BM;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 5/00 (2006.01); H04L 5/14 (2006.01); H04B 3/54 (2006.01); H04B 3/56 (2006.01); H04L 25/49 (2006.01);
U.S. Cl.
CPC ...
H04L 5/14 (2013.01); H04B 3/542 (2013.01); H04B 3/56 (2013.01); H04B 5/005 (2013.01); H04B 5/0037 (2013.01); H04L 25/4904 (2013.01); H04B 2203/542 (2013.01); H04B 2203/5412 (2013.01); H04B 2203/5483 (2013.01);
Abstract

Techniques for duplex communication and power transfer across an isolator are provided. In an example, a first transceiver coupled to a first side of an isolator can include a transmit modulator configured to receive first data and timing signals, to provide control signals to oscillate an output of the transceiver to transmit power and to order each half-cycle of an oscillation cycle of the output to transmit the first data. A second transceiver coupled to a second side of the isolator can include a receive detection circuit configured to compare a received oscillation cycle with a plurality of thresholds and to provide a plurality of comparator outputs indicative of reception of the positive half-cycle and the negative half-cycle, and a receive decoder configured to identify the order of half-cycles and to provide an output indicative of logic level of the first data.


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