The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2019

Filed:

Jun. 27, 2018
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza (MB), IT;

Inventors:

Luigino D'Alessio, Zelo Surrigone, IT;

Germano Nicollini, Piacenza, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza (MB), IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03M 1/46 (2006.01); H03F 1/32 (2006.01); H03F 3/00 (2006.01); H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
H03M 1/466 (2013.01); H03F 1/3211 (2013.01); H03F 3/005 (2013.01); H03F 3/45475 (2013.01); H03M 1/468 (2013.01); H03F 2200/156 (2013.01); H03F 2200/159 (2013.01); H03F 2200/264 (2013.01); H03F 2203/45134 (2013.01); H03F 2203/45136 (2013.01); H03F 2203/45171 (2013.01); H03F 2203/45514 (2013.01); H03F 2203/45534 (2013.01); H03F 2203/45546 (2013.01); H03F 2203/45551 (2013.01);
Abstract

In some embodiments, a circuit for use in devices involving digital-to-analog conversion of signals includes: a capacitive digital-to-analog converter array and an amplifier. The capacitive digital-to-analog converter includes an input port for receiving a digital input signal and an output port. The amplifier includes capacitive feedback loops that include a first capacitor coupling the output of the amplifier with the input of the amplifier and a second capacitor coupled to the output port of the digital-to-analog converter array at the input of the amplifier. The circuit further includes a set of switches that include a first switch and a second switch coupled with opposed ends of the second capacitor at the input and at the output of the amplifier, respectively.


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