The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2019
Filed:
Jul. 19, 2017
Shanghai Tianma Am-oled Co., Ltd., Shanghai, CN;
Tianma Micro-electronics Co., Ltd., Shanghai, CN;
Qiong Xu, Shanghai, CN;
Jianjun Zhang, Shanghai, CN;
SHANGHAI TIANMA AM-OLED CO., LTD., Shanghai, CN;
TIANMA MICRO-ELECTRONICS CO., LTD., Shenzhen, CN;
Abstract
Embodiments of the disclosure provide a method for fabricating a lightly doped drain area, a thin film transistor, and a thin film transistor array substrate. In an embodiment of the disclosure, a poly-silicon layer, a gate insulation layer, and a gate metal layer are formed in sequence on a substrate; the gate metal layer is patterned to form a gate electrode; the gate insulation layer is etched to form a stepped structure, wherein a width of the gate electrode is smaller than a width of the stepped structure, and an edge of the stepped structure is not covered by the gate electrode; and the poly-silicon layer is doped by an ion doping process using the gate electrode and the gate insulation layer with the stepped structure as a mask to form both a lightly doped area and a heavily doped area.