The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2019
Filed:
Apr. 28, 2015
Applicant:
Hitachi, Ltd., Chiyoda-ku, Tokyo, JP;
Inventor:
Seiji Miura, Tokyo, JP;
Assignee:
HITACHI, LTD., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G11C 13/00 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0004 (2013.01); G06F 12/00 (2013.01); G06F 12/02 (2013.01); G11C 13/0023 (2013.01); G11C 13/0069 (2013.01); G11C 13/0097 (2013.01); G11C 2013/0078 (2013.01); G11C 2213/75 (2013.01);
Abstract
Disclosed is a nonvolatile memory control method in which a unit of erase and a unit of read are different from each other. The control method includes: allocating a physical address of the nonvolatile memory to a logical address in a predetermined unit; and controlling a size of the unit of erase in which a physical address allocated to a logical address is included according to a write access state with respect to the logical address in the predetermined unit.