The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2019

Filed:

Jul. 27, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Richard H. Boivie, Monroe, CT (US);

Bradly G. Frey, Austin, TX (US);

William E. Hall, Clinton, CT (US);

Benjamin Herrenschmidt, Narrabundah, AU;

Guerney D. H. Hunt, Yorktown Heights, NY (US);

Jentje Leenstra, Bondorf, DE;

Paul Mackerras, Weston, AU;

Cathy May, Ossining, NY (US);

Albert J. Van Norstrand, Jr., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 21/74 (2013.01); G06F 9/455 (2018.01); G06F 21/53 (2013.01);
U.S. Cl.
CPC ...
G06F 21/74 (2013.01); G06F 9/45558 (2013.01); G06F 21/53 (2013.01); G06F 2009/45587 (2013.01); G06F 2221/2149 (2013.01);
Abstract

Hardware based isolation for secure execution of virtual machines (VMs). At least one virtual machine is executed via operation of a hypervisor and an ultravisor. A first memory component is configured for access by the hypervisor and the ultravisor, and a second memory component is configured for access by the ultravisor and not by the hypervisor. A first mode of operation is operated, such that the virtual machine is executed using the hypervisor, wherein the first memory component is accessible to the virtual machine and the second memory component is not accessible to the virtual machine. A second mode of operation is operated, such that the virtual machine is executed using the ultravisor, wherein the first memory component and the second memory component are accessible to the virtual machine, thereby executing application code and operating system code using the second memory component without code changes.


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