The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2019
Filed:
Mar. 31, 2016
Qualcomm Incorporated, San Diego, CA (US);
Jason Edward Podaima, Markham, CA;
Christophe Denis Bernard Avoinne, Campbell, CA (US);
Manokanthan Somasundaram, Markham, CA;
Sina Dena, San Diego, CA (US);
Paul Christopher John Wiercienski, Toronto, CA;
Bohuslav Rychlik, San Diego, CA (US);
Steven John Halter, San Diego, CA (US);
Jaya Prakash Subramaniam Ganasan, Youngsville, NC (US);
Myil Ramkumar, Richmond Hill, CA;
Dipti Ranjan Pal, Irvine, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Methods and systems are disclosed for full-hardware management of power and clock domains related to a distributed virtual memory (DVM) network. An aspect includes transmitting, from a DVM initiator to a DVM network, a DVM operation, broadcasting, by the DVM network to a plurality of DVM targets, the DVM operation, and, based on the DVM operation being broadcasted to the plurality of DVM targets by the DVM network, performing one or more hardware optimizations comprising: turning on a clock domain coupled to the DVM network or a DVM target of the plurality of DVM targets that is a target of the DVM operation, increasing a frequency of the clock domain, turning on a power domain coupled to the DVM target based on the power domain being turned off, or terminating the DVM operation to the DVM target based on the DVM target being turned off.