The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2019

Filed:

Mar. 20, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Lawrence H. Rubin, Austin, TX (US);

David C. Tannenbaum, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/317 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31705 (2013.01); G06F 11/00 (2013.01);
Abstract

According to one general aspect, an apparatus may include a plurality of performance and debug monitoring circuits (PDMCs). Each performance and debug monitoring circuit (PDMC) may include an input stage, a combinatorial stage, and a counter. The input stage may be configured to receive a plurality of input signals, wherein the input signals include: signals from other performance and debug monitoring circuits, signals from combinatorial logic circuits, and configuration values. The combinatorial stage may be configured to perform one or more logical operations on a selected sub-set of the input signals. The counter may be configured to increment based, at least in part, upon a result of the combinatorial stage.


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