The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2019

Filed:

Nov. 28, 2018
Applicant:

Imec Vzw, Leuven, BE;

Inventors:

Roeland Vandebriel, Lummen, BE;

Geert Van der Plas, Leuven, BE;

Vladimir Cherman, Heverlee, BE;

Assignee:

IMEC vzw, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 21/02 (2006.01); G11C 5/04 (2006.01); G11C 7/20 (2006.01); H03K 5/153 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H03K 21/023 (2013.01); G11C 5/04 (2013.01); G11C 7/20 (2013.01); H01L 25/0657 (2013.01); H03K 5/153 (2013.01); H03K 21/026 (2013.01);
Abstract

An assembly including a carrier substrate and at least one group of interconnected integrated circuit modules mounted thereon is disclosed. The modules are provided with a connection for transmitting a clock signal through the group of interconnected modules. The modules are also provided with digital input ports and output ports and a logic circuit configured for identifying the position of the modules in the group on the basis of a count of the clock pulses, and on the basis of the logic state of the input and output ports. In one aspect, a method involves the transfer of a token in the form of one or more logic states, through the group of modules, from a first module to a last module, resulting in the identification of all modules in a progressive manner.


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