The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2019
Filed:
Jun. 30, 2017
Applicant:
SK Hynix Inc., Icheon, KR;
Inventors:
Jae In Lee, Icheon, KR;
Yong Mi Kim, Hwaseong, KR;
Assignee:
SK HYNIX INC., Icheon, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); G11C 29/52 (2006.01); G11C 29/14 (2006.01); G11C 29/42 (2006.01); G11C 29/46 (2006.01); G11C 11/4096 (2006.01); G11C 11/4076 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 11/1048 (2013.01); G11C 29/14 (2013.01); G11C 29/42 (2013.01); G11C 29/46 (2013.01); G11C 29/52 (2013.01); G11C 11/4076 (2013.01); G11C 11/4096 (2013.01); G11C 2207/229 (2013.01);
Abstract
A semiconductor device includes a write read control circuit for outputting a write enable signal which is enabled in response to a write command, and a test mode signal; and an error correction circuit suitable for performing a calculation operation of determining an error information of input data in response to the write enable signal and then outputting an internal parity signal including the error information, and outputting internal data by delaying the input data in response to the write enable signal.