The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2019

Filed:

Sep. 21, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Shivam Priyadarshi, Morrisville, NC (US);

Rami Mohammad A. Al Sheikh, Morrisville, NC (US);

Brandon Dwiel, Jamaica Plain, MA (US);

Derek Hower, Durham, NC (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/30 (2018.01); G06F 9/32 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3802 (2013.01); G06F 9/30043 (2013.01); G06F 9/325 (2013.01); G06F 9/383 (2013.01); G06F 9/3808 (2013.01); G06F 9/3832 (2013.01); G06F 9/3838 (2013.01); G06F 9/3867 (2013.01);
Abstract

Systems and methods for constructing an instruction slice for prefetching data of a data-dependent load instruction include a slicer for identifying a load instruction in an instruction sequence as a first occurrence of a qualified load instruction which will miss in a last-level cache. A commit buffer stores information pertaining to the first occurrence of the qualified load instruction and shadow instructions which follow. For a second occurrence of the qualified load instruction, an instruction slice is constructed from the information in the commit buffer to form a slice payload. A pre-execution engine pre-executes the instruction slice based on the slice payload to determine an address from which data is to be fetched for execution of a third and any subsequent occurrences of the qualified load instruction. The data is prefetched from the determined address for the third and any subsequent occurrence of the qualified load instruction.


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