The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Apr. 05, 2017
Applicant:

Futurewei Technologies, Inc., Plano, TX (US);

Inventor:

Hiroshi Takatori, Sacramento, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04Q 1/20 (2006.01); H04L 5/14 (2006.01); H04B 1/38 (2015.01); H04L 27/36 (2006.01); H04B 1/04 (2006.01); H04L 7/04 (2006.01); H04L 29/08 (2006.01); H04W 88/14 (2009.01);
U.S. Cl.
CPC ...
H04L 5/143 (2013.01); H04B 1/0475 (2013.01); H04B 1/0483 (2013.01); H04B 1/38 (2013.01); H04L 5/14 (2013.01); H04L 5/1461 (2013.01); H04L 7/042 (2013.01); H04L 27/36 (2013.01); H04L 27/366 (2013.01); H04L 69/323 (2013.01); H04W 88/14 (2013.01);
Abstract

A system for a backplane serializer/deserializer (SerDes) including first and second integrated circuits (IC). The first and second ICs include transmitters and receivers coupled to each other through first and second bidirectional links. A first receiver is configured to receive first data at a data rate on a first channel supported by both the first bidirectional link and the second bidirectional link. A second receiver is configured to receive second data at the data rate on a second channel supported by both the first bidirectional link and the second bidirectional link. The backplane SerDes is configured to transfer the first and second data in full duplex mode by employing two-bit pulse-amplitude modulation (PAM-4) to reduce signaling speed of the first and second bidirectional links without reducing throughput of a lane pair including the first and second channels.


Find Patent Forward Citations

Loading…