The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Sep. 06, 2018
Applicant:

Shanghai National Engineering Research Center of Digital Television Co., Ltd., Shanghai, CN;

Inventors:

Wenjun Zhang, Shanghai, CN;

Yijun Shi, Shanghai, CN;

Dazhi He, Shanghai, CN;

Yunfeng Guan, Shanghai, CN;

Yin Xu, Shanghai, CN;

Xufeng Guo, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); H03M 13/27 (2006.01); H04L 1/00 (2006.01); H03M 13/03 (2006.01); H03M 13/11 (2006.01); H03M 13/25 (2006.01); H03M 13/29 (2006.01); H03M 13/15 (2006.01); H04L 27/18 (2006.01); H04L 27/34 (2006.01);
U.S. Cl.
CPC ...
H03M 13/2792 (2013.01); H03M 13/036 (2013.01); H03M 13/1148 (2013.01); H03M 13/1165 (2013.01); H03M 13/255 (2013.01); H03M 13/271 (2013.01); H03M 13/2778 (2013.01); H03M 13/2906 (2013.01); H03M 13/6522 (2013.01); H04L 1/0041 (2013.01); H04L 1/0058 (2013.01); H04L 1/0071 (2013.01); H03M 13/152 (2013.01); H04L 1/0057 (2013.01); H04L 27/18 (2013.01); H04L 27/3405 (2013.01);
Abstract

An interleaving and mapping method and a deinterleaving and demapping method for an LDPC codeword are provided. The interleaving and mapping method comprises: performing first bit interleaving on a parity bits part of the LDPC codeword to obtain interleaved parity bits; splicing an information bit part of the codeword and the interleaved parity bits into a codeword after the first bit interleaving; dividing the codeword after the first bit interleaving into multiple consecutive bit subblocks in a predetermined length, and changing the order of the bit subblocks according to a corresponding permutation order (bit-swapping pattern) to form a codeword after second bit interleaving; dividing the codeword after the second bit interleaving into two parts, and writing the two parts into storage space in a column order respectively and reading the two parts from the storage space in a row order respectively to obtain a codeword after third bit interleaving.


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