The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Dec. 27, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Rahul Karmaker, San Diego, CA (US);

Bin Fan, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 1/02 (2006.01); H03F 3/193 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0205 (2013.01); H03F 3/193 (2013.01); H03F 3/4521 (2013.01); H03F 2200/36 (2013.01); H03F 2200/411 (2013.01); H03F 2200/451 (2013.01); H03F 2200/456 (2013.01); H03F 2200/555 (2013.01); H03F 2203/45022 (2013.01); H03F 2203/45026 (2013.01); H03F 2203/45172 (2013.01); H03F 2203/45188 (2013.01); H03F 2203/45288 (2013.01);
Abstract

Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.


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