The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2019
Filed:
Nov. 05, 2014
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Subbarao Surendra Chakkirala, San Jose, CA (US);
Jiwei Chen, Fremont, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H02M 3/156 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 3/158 (2013.01); H02M 3/156 (2013.01); H02M 2001/0012 (2013.01); H02M 2001/0022 (2013.01);
Abstract
In one embodiment, a control circuit adjusts a duty cycle of a boost converter and comprises a duty cycle limiter generator configured to receive an input voltage provided to the boost converter and to generate a control signal to be provided to the boost converter for adjusting the duty cycle of the boost converter to control the output voltage of the booster converter in response to the input voltage. In one embodiment, the maximum duty cycle limit generator further generates the maximum duty cycle signal in response to an output voltage of the boost converter.