The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Jan. 17, 2018
Applicant:

Cypress Semiconductor Corporation, San Jose, CA (US);

Inventors:

Derwin W. Mattos, San Mateo, CA (US);

Arnab Chakraborty, Bangalore, IN;

Ramakrishna Venigalla, Bangalore, IN;

Gerard Kato, San Jose, CA (US);

Vaidyanathan Varsha, Milpitas, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 3/00 (2006.01); H02H 3/08 (2006.01); G01R 17/02 (2006.01); G01R 19/165 (2006.01); H02H 1/00 (2006.01); H03K 3/0233 (2006.01); H02H 3/087 (2006.01);
U.S. Cl.
CPC ...
H02H 3/08 (2013.01); G01R 17/02 (2013.01); G01R 19/165 (2013.01); H02H 1/0007 (2013.01); H02H 3/087 (2013.01); H03K 3/02337 (2013.01);
Abstract

In an example embodiment, a device comprises a gate driver and a current detector circuit. The gate driver is configured to be coupled to a power switch on the VBUS line of a USB connector. The current detector circuit is configured to be coupled to the VBUS line and comprises a current sense amplifier, a reference voltage generator circuit, and a comparator. The current sense amplifier is configured to receive a pair of input voltages and to output an indicator signal responsive to the input voltage difference. The reference voltage generator circuit comprises a digital-to-analog converter configured to generate a reference voltage signal based on a received voltage selector signal that is a binary input signal comprising multiple bit values. The comparator is configured to receive the indicator signal and the reference voltage signal and to output an interrupt signal responsive to the indicator signal exceeding the reference voltage signal.


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