The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Oct. 12, 2016
Applicant:

Osram Opto Semiconductors Gmbh, Regensburg, DE;

Inventors:

Fabian Kopp, Penang, MY;

Sebastian Taeger, Bad Abbach, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/24 (2010.01); H01L 33/32 (2010.01); H01L 33/30 (2010.01); H01L 33/42 (2010.01); H01L 33/00 (2010.01); H01L 33/40 (2010.01); H01L 33/20 (2010.01); H01L 33/44 (2010.01);
U.S. Cl.
CPC ...
H01L 33/24 (2013.01); H01L 33/0062 (2013.01); H01L 33/0075 (2013.01); H01L 33/20 (2013.01); H01L 33/30 (2013.01); H01L 33/32 (2013.01); H01L 33/405 (2013.01); H01L 33/42 (2013.01); H01L 33/005 (2013.01); H01L 33/44 (2013.01); H01L 2933/0016 (2013.01);
Abstract

The invention relates to an optoelectronic semiconductor chip (), comprising an n-doped semiconductor layer (), a p-doped semiconductor layer () and an active layer () arranged between the n-doped semiconductor layer () and the p-doped semiconductor layer (), wherein the p-doped semiconductor layer () has an electrically conductive layer () arranged above it that is set up for making electrical contact with the p-doped semiconductor layer (), wherein a lateral edge () is arranged laterally with respect to the n-doped semiconductor layer (), the p-doped semiconductor layer () and the active layer (), wherein the lateral edge () has at least two oblique edge portions, wherein a first edge portion () has at least areas arranged laterally with respect to the p-doped semiconductor layer (), wherein a second lateral edge () has at least areas arranged laterally with respect to the n-doped semiconductor layer (), wherein the angle of the first edge portion () in relation to the active layer () is shallower than the angle of the second edge portion (), and wherein the electrically conductive layer () is at a lateral distance from the lateral edge ().


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