The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Nov. 14, 2017
Applicant:

Electronics and Telecommunications Research Institute, Daejeon, KR;

Inventors:

Doo-Hee Cho, Daejeon, KR;

Young Sam Park, Daejeon, KR;

Chunwon Byun, Daejeon, KR;

Byoung Gon Yu, Chungcheongbuk-do, KR;

Jonghee Lee, Daejeon, KR;

Hyunkoo Lee, Daejeon, KR;

Nam Sung Cho, Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/786 (2006.01); H01L 51/00 (2006.01); H01L 21/288 (2006.01); H01L 21/02 (2006.01); H01L 51/10 (2006.01); H01L 29/423 (2006.01); H01L 21/683 (2006.01); H01L 51/05 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78603 (2013.01); H01L 21/02002 (2013.01); H01L 21/02288 (2013.01); H01L 21/02628 (2013.01); H01L 21/288 (2013.01); H01L 21/683 (2013.01); H01L 21/6835 (2013.01); H01L 29/423 (2013.01); H01L 29/42356 (2013.01); H01L 29/786 (2013.01); H01L 29/78636 (2013.01); H01L 51/0004 (2013.01); H01L 51/0021 (2013.01); H01L 51/10 (2013.01); H01L 21/02532 (2013.01); H01L 21/02554 (2013.01); H01L 21/02565 (2013.01); H01L 29/66765 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 29/78651 (2013.01); H01L 51/0055 (2013.01); H01L 51/0545 (2013.01); H01L 2221/6835 (2013.01); H01L 2221/68318 (2013.01);
Abstract

Embodiments of the inventive concepts provide a method of fabricating a flexible substrate and the flexible substrate fabricated thereby. The method includes printing a gate catalyst pattern on a separation layer, forming a gate plating pattern on the gate catalyst pattern, forming a gate insulating layer on the gate plating pattern, printing a source catalyst pattern and a drain catalyst pattern spaced apart from each other on the gate insulating layer, and forming a source plating pattern and a drain plating pattern on the source catalyst pattern and the drain catalyst pattern, respectively.


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