The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Apr. 17, 2017
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Arul Balasubramaniyan, Plano, TX (US);

Thomas Gregory Mckay, Boulder Creek, CA (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/786 (2006.01); H03F 3/45 (2006.01); H03F 1/02 (2006.01); H03F 1/22 (2006.01); H03F 3/195 (2006.01); H03F 3/24 (2006.01); H03F 3/72 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78603 (2013.01); H01L 29/78648 (2013.01); H03F 1/0277 (2013.01); H03F 1/223 (2013.01); H03F 3/195 (2013.01); H03F 3/245 (2013.01); H03F 3/45179 (2013.01); H03F 3/72 (2013.01); H03F 2200/451 (2013.01); H03F 2200/511 (2013.01); H03F 2203/45112 (2013.01); H03F 2203/45228 (2013.01); H03F 2203/45342 (2013.01); H03F 2203/45394 (2013.01); H03F 2203/45731 (2013.01);
Abstract

Embodiments of the present disclosure provide a circuit structure and method for power amplifier control with forward and reverse voltage biases to transistor back-gate regions. A circuit structure according to the disclosure can include: a power amplifier (PA) circuit having first and second transistors, the first and second transistors each including a back-gate region, wherein the back-gate region of each of the first and second transistors is positioned within a doped substrate separated from a semiconductor region by a buried insulator layer; and an analog voltage source coupled to the back-gate regions of the first and second transistors of the PA circuit, such that the analog voltage source alternatively supplies a forward bias voltage or a reverse bias voltage to the back-gate regions of the first and second transistors of the PA circuit to produce a continuously sloped power ramping profile.


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