The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Dec. 18, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Daeik Kim, Hwaseong-si, KR;

Semyeong Jang, Gunpo-si, KR;

Jemin Park, Suwon-si, KR;

Yoosang Hwang, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 21/71 (2006.01); H01L 27/108 (2006.01); H01L 29/792 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10885 (2013.01); H01L 21/28273 (2013.01); H01L 21/71 (2013.01); H01L 27/10808 (2013.01); H01L 27/10814 (2013.01); H01L 27/10823 (2013.01); H01L 27/10876 (2013.01); H01L 27/10882 (2013.01); H01L 29/7926 (2013.01); H01L 21/823475 (2013.01);
Abstract

A volatile memory device can include a bit line structure having a vertical side wall. A lower spacer can be on a lower portion of the vertical side wall, where the lower spacer can be defined by a first thickness from the vertical side wall to an outer side wall of the lower spacer. An upper spacer can be on an upper portion of the vertical side wall above the lower portion, where the upper spacer can be defined by a second thickness that is less than the first thickness, the upper spacer exposing an uppermost portion of the outer side wall of the lower spacer.


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