The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2019
Filed:
Jul. 27, 2016
Applicant:
Synaptics Japan Gk, Tokyo, JP;
Inventor:
Masatoshi Taya, Tokyo, JP;
Assignee:
Synaptics Japan GK, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 21/765 (2006.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 27/092 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 21/765 (2013.01); H01L 27/088 (2013.01); H01L 29/0692 (2013.01); H01L 29/0847 (2013.01); H01L 29/42356 (2013.01); H01L 21/823481 (2013.01); H01L 27/0922 (2013.01);
Abstract
Provided is a semiconductor device including an active region defined by a separation region on a main surface of a semiconductor substrate, and a field effect transistor formed in the active region. A boundary portion, over which a gate electrode pattern strides, is disposed in a boundary between the active region and the separation region and is configured such that a length of one side, in a direction of a gate length of the field effect transistor formed in the active region, becomes larger than the gate length and does not come into contact with at least one of a pair of source and drain regions of the field effect transistor.