Nonvolatile memory device and operating method of the same

Abstract

A nonvolatile memory device includes a plurality of memory cells and a page buffer including a plurality of page buffer units each connected to the plurality of memory cells through one bit line of a plurality of bit lines and configured to generate output data based on data states of the plurality of memory cells. A first page buffer unit of the plurality of page buffer units includes first to third latches which latch first to third read data at first to third time points, respectively by developing a voltage level of the sensing node, and a fourth latch which generates a fourth read data based on the second and third read data. The first page buffer unit is configured to selectively output the fourth read data as the output data, depending on whether an error correction of the first read data is possible.