The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Sep. 08, 2017
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Sridhar Srinivasan, Shanghai, CN;

Pohsiang Hsu, Redmond, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06K 9/36 (2006.01); G06K 9/46 (2006.01); H04N 19/103 (2014.01); H04N 19/105 (2014.01); H04N 19/52 (2014.01); H04N 19/50 (2014.01); H04N 19/176 (2014.01); H04N 19/70 (2014.01); H04N 19/147 (2014.01); H04N 19/172 (2014.01); H04N 19/46 (2014.01); H04N 19/51 (2014.01); H04N 19/196 (2014.01); H04N 19/129 (2014.01); H04N 19/61 (2014.01); H04N 19/132 (2014.01); H04N 19/146 (2014.01); H04N 19/82 (2014.01); H04N 19/527 (2014.01); H04N 19/523 (2014.01); H04N 19/587 (2014.01); H04N 19/86 (2014.01); H04N 19/507 (2014.01); H04N 19/513 (2014.01);
U.S. Cl.
CPC ...
H04N 19/103 (2014.11); H04N 19/105 (2014.11); H04N 19/129 (2014.11); H04N 19/132 (2014.11); H04N 19/146 (2014.11); H04N 19/147 (2014.11); H04N 19/172 (2014.11); H04N 19/176 (2014.11); H04N 19/196 (2014.11); H04N 19/46 (2014.11); H04N 19/50 (2014.11); H04N 19/507 (2014.11); H04N 19/51 (2014.11); H04N 19/513 (2014.11); H04N 19/52 (2014.11); H04N 19/523 (2014.11); H04N 19/527 (2014.11); H04N 19/587 (2014.11); H04N 19/61 (2014.11); H04N 19/70 (2014.11); H04N 19/82 (2014.11); H04N 19/86 (2014.11);
Abstract

Various techniques and tools for encoding and decoding (e.g., in a video encoder/decoder) binary information (e.g., skipped macroblock information) are described. In some embodiments, the binary information is arranged in a bit plane, and the bit plane is coded at the picture/frame layer. The encoder and decoder process the binary information and, in some embodiments, switch coding modes. For example, the encoder and decoder use normal, row-skip, column-skip, or differential modes, or other and/or additional modes. In some embodiments, the encoder and decoder define a skipped macroblock as a predicted macroblock whose motion is equal to its causally predicted motion and which has zero residual error. In some embodiments, the encoder and decoder use a raw coding mode to allow for low-latency applications.


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