The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Nov. 01, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Haewon Lee, Yongin-si, KR;

Sangjoo Lee, Seongnam-si, KR;

Moosup Lim, Yongin-si, KR;

Younghwan Park, Namyangju-si, KR;

Dongjoo Yang, Seongnam-si, KR;

Kang-Sun Lee, Hwaseong-si, KR;

Jiwon Lee, Daegu, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/02 (2006.01); H04N 5/374 (2011.01); H04N 5/378 (2011.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14654 (2013.01); H01L 27/1463 (2013.01); H01L 27/14607 (2013.01); H01L 27/14612 (2013.01); H01L 31/02019 (2013.01); H04N 5/374 (2013.01); H04N 5/378 (2013.01);
Abstract

An image sensor includes a separation impurity layer in a semiconductor layer and defining a photoelectric conversion region and a readout circuit region, a photoelectric conversion layer in the semiconductor layer of the photoelectric conversion region and surrounded by the separation impurity layer, a floating diffusion region spaced apart from the photoelectric conversion layer and in the semiconductor layer of the photoelectric conversion region, a transfer gate electrode between the photoelectric conversion layer and the floating diffusion region, and impurity regions in the semiconductor layer of the readout circuit region. When the photoelectric conversion layer is integrated with photo-charges, the separation impurity layer has a first potential level around the photoelectric conversion layer and a second potential level on a portion between the photoelectric conversion layer and the impurity regions of the readout circuit region. The second potential level is greater than the first potential level.


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