The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

May. 03, 2017
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, CN;

Inventor:

Zhichao Zhou, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 27/12 (2006.01); H01L 21/443 (2006.01); H01L 21/027 (2006.01); H01L 21/4757 (2006.01); H01L 23/00 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 29/24 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1288 (2013.01); H01L 21/0272 (2013.01); H01L 21/0274 (2013.01); H01L 21/02565 (2013.01); H01L 21/02631 (2013.01); H01L 21/443 (2013.01); H01L 21/47573 (2013.01); H01L 24/45 (2013.01); H01L 27/124 (2013.01); H01L 27/127 (2013.01); H01L 27/1225 (2013.01); H01L 27/1262 (2013.01); H01L 29/24 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01);
Abstract

A method for manufacturing a TFT (Thin-Film Transistor) substrate is proposed. The method includes utilizing a first photomask process to form a buffer layer, a data line, a source electrode, a first scan line, a second scan line, and a gate electrode on a substrate; utilizing a second photomask process to form a first insulation layer, a second insulation layer, a first semiconductor layer, and a second semiconductor layer on the substrate; and utilizing a third photomask process to form a first conductor layer, an electrical connection portion, and a drain electrode on the substrate.


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