The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Dec. 28, 2017
Applicants:

Industrial Technology Research Institute, Hsinchu, TW;

Intellectual Property Innovation Corporation, Hsinchu, TW;

Inventors:

Shu-Wei Kuo, Hsinchu County, TW;

Wei-Yuan Cheng, Hsinchu County, TW;

Shau-Fei Cheng, Pingtung County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/544 (2006.01); H01L 21/67 (2006.01); H01L 21/48 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 24/75 (2013.01); H01L 21/4853 (2013.01); H01L 21/67144 (2013.01); H01L 23/3185 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 23/544 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 2223/54426 (2013.01); H01L 2224/16165 (2013.01); H01L 2224/75753 (2013.01); H01L 2224/75756 (2013.01); H01L 2224/81121 (2013.01); H01L 2224/81136 (2013.01);
Abstract

A chip bonding apparatus for bonding a chip and a redistribution structure with each other is provided. The chip bonding apparatus includes a pick and place module and an alignment module. The pick and place module is suitable for picking up and placing the chip. The alignment module is movably connected to the pick and place module. The alignment module includes at least one alignment protrusion, wherein the at least one alignment protrusion extends toward at least one alignment socket included in the redistribution structure. Furthermore, a chip bonding method and a chip package structure are provided.


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