The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Dec. 12, 2016
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventor:

Setsuko Wakimoto, Nagano, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/16 (2006.01); H01L 29/423 (2006.01); H01L 21/3213 (2006.01); H01L 21/04 (2006.01); H01L 21/3215 (2006.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28035 (2013.01); H01L 21/049 (2013.01); H01L 21/28105 (2013.01); H01L 21/32135 (2013.01); H01L 29/1608 (2013.01); H01L 29/42372 (2013.01); H01L 29/42376 (2013.01); H01L 29/4916 (2013.01); H01L 21/32155 (2013.01);
Abstract

The present invention provides a process for producing a semiconductor device having a breakdown voltage heightened by improving the step coverage properties of the interlayer dielectric for covering polysilicon electrodes. The process includes a step in which a gate insulating film is formed on a silicon carbide substrate, a step in which a polysilicon film is formed on the gate insulating film, a step in which one or more dopants of N, P, As, Sb, B, Al, and Ar are ion implanted into the polysilicon film, and a step in which a mask is selectively formed on the polysilicon film. The exposed portions of the polysilicon film are removed by isotropic dry etching. Thus, polysilicon electrodes can be formed so that in each polysilicon electrode, the hem part sandwiched between the bottom surface and the lateral surface of the polysilicon electrode has an inclination angle of 60° or less.


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