The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Feb. 19, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Josephine B. Chang, Ellicott City, MD (US);

Isaac Lauer, Yorktown Heights, NY (US);

Amlan Majumdar, White Plains, NY (US);

Jeffrey W. Sleight, Ridgefield, CT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/265 (2006.01); H01L 21/762 (2006.01); H01L 27/12 (2006.01); H01L 21/84 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 21/2654 (2013.01); H01L 21/76283 (2013.01); H01L 21/84 (2013.01); H01L 27/1203 (2013.01); H01L 29/78681 (2013.01);
Abstract

Techniques for forming dual III-V semiconductor channel materials to enable fabrication of different device types on the same chip/wafer are provided. In one aspect, a method of forming dual III-V semiconductor channel materials on a wafer includes the steps of: providing a wafer having a first III-V semiconductor layer on an oxide; forming a second III-V semiconductor layer on top of the first III-V semiconductor layer, wherein the second III-V semiconductor layer comprises a different material with an electron affinity that is less than an electron affinity of the first III-V semiconductor layer; converting the first III-V semiconductor layer in at least one second active area to an insulator using ion implantation; and removing the second III-V semiconductor layer from at least one first active area selective to the first III-V semiconductor layer.


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