The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 30, 2019
Filed:
Aug. 27, 2015
Applicant:
Hitachi, Ltd., Chiyoda-ku, Tokyo, JP;
Inventors:
Takuya Okuyama, Tokyo, JP;
Masanao Yamaoka, Tokyo, JP;
Assignee:
HITACHI, LTD., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 11/419 (2006.01); G06F 7/00 (2006.01); G06N 99/00 (2019.01); G06F 7/58 (2006.01); G06N 7/00 (2006.01); G11C 7/10 (2006.01); G11C 7/22 (2006.01); G11C 11/16 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G06F 7/00 (2013.01); G06F 7/588 (2013.01); G06N 7/005 (2013.01); G06N 99/00 (2013.01); G11C 7/1006 (2013.01); G11C 7/222 (2013.01); G11C 11/1655 (2013.01); G11C 11/1657 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01);
Abstract
Provided are a semiconductor device and an information processing device that can be manufactured easily at low cost and can calculate an arbitrary interaction model such as an Ising model. A semiconductor device that performs a non-linear operation includes a memory, a reading unit that reads data from the memory, a majority circuit that inputs a result of a predetermined operation on the data read by the reading unit, and a write circuit that receives an output of the majority circuit, a value of a predetermined signal is stochastically inverted at a preceding stage of the majority circuit.